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Public Key Cryptographic Coprocessor


The Public Key Cryptographic Coprocessor (PK2C) is a hardware accelerator intended to speed-up the core functions of public-key cryptography algorithms such as RSA, DSA, Diffie-Hellman, El-Gamal or Elliptic Curves (ECC).


▪ Direct Memory Access (DMA) and arbiter;
▪ shared memory:
− no extra silicon cost;
− inputs and results directly accessible by software.
▪ multiple arithmetic operations:
− integer multiply, multiply & accumulate, square, addition, subtraction;
− modular multiplication.
▪ all 32 bits multiple operations up to 8192 bits;
▪ efficient software control through stackable operations:
− the next operation can be anticipated to avoid software slowdown;
− the next operation is stacked then automatically executed once the PK2C is available.
▪ configurable architecture:
− small or fast RTL implementations available;
− gated clock insertion ready.
▪ support CRT to speed-up RSA;
▪ gate count smaller than 10 kgates;
▪ straightforward integration through AMBA 3 AHB-Lite interface (customized on request);
▪ PK2C-optimized software libraries available (RSA, DSA, DH, El-Gamal and ECC);
▪ typical consumption of contactless protocol smaller than 4 mA in a 130 nm implementation.


▪ VHDL source codes;
▪ VHDL testbenches;
▪ Synopsys synthesis scripts;
▪ C integration tests;
▪ design specification;
▪ integration manual.

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