The EPC Gen2 Digital Controller is a fully integrated protocol manager intended for Radio-Frequency Identification (RFID) tags.
▪ fully compliant with the EPC Gen2 standard;
▪ RX frame decoding, command execution and TX frame coding;
▪ custom commands on request;
▪ total gate count smaller than 10 kgates;
▪ operating power consumption lower than 10 µW;
▪ straightforward interfacing with the memory block;
▪ silicon proven in a 110 nm CMOS process;
▪ analog front end available separately.
▪ VHDL source code;
▪ VHDL testbenches;
▪ Synopsys synthesis scripts;
▪ design specification.